A minimum power VCO design using an IMOS varactor for portable RF circuits

Article Sidebar

PDF
Published: Dec 12, 2019
Keywords:
Back-gate tuning Delay cell IMOS Low power Phase noise Varactor

Main Article Content

Vivek Jangra
University School of Information, Communication and Technology, Guru Gobind Singh Indraprastha University, New Delhi, India
https://orcid.org/0000-0001-6630-665X
Manoj Kumar
University School of Information, Communication and Technology, Guru Gobind Singh Indraprastha University, New Delhi, India

Abstract

This paper presents a wide tuning range voltage-controlled oscillator (VCO) circuit in 180 nm CMOS technology using an inversion mode MOSFET (IMOS) varactor in delay stages. Frequency variation in the VCO has been achieved by changing the capacitance of the output node with the use of an IMOS varactor comprised of two NMOS transistors connected in parallel. The VCO circuit uses a CMOS inverter and output frequency tuning that has been attained by varying the back-gate voltage  and source/drain voltage  of the IMOS varactor. Supply voltage variations from 1 V to 3 V achieves a tuning range from 0.280 GHz to 1.163 GHz along with power dissipation of 0.003 mW to 3.290 mW. Source/drain voltage  variations from 0.1 V to 1.5 V achieve a tuning range of 0.685 GHz to 0.816 GHz along with power dissipation of 0.465 mW. Furthermore, the frequency varies from 0.810 GHz to 0.843 GHz with back-gate voltage  tuning of the IMOS varactor. The results were obtained with different IMOS varactor widths and various combinations of supply voltages to achieve output frequency, power dissipation as well as phase noise. The VCO shows a phase noise of ‑102.81 dBc/Hz@1MHz and a figure of merit (FoM) is -162.10 dBc/Hz. The proposed VCO circuit attains reasonable performance results that are appropriate for low power radio frequency applications.

Article Details

How to Cite
Jangra, V., & Kumar, M. (2019). A minimum power VCO design using an IMOS varactor for portable RF circuits. Engineering and Applied Science Research, 46(4), 331–339. Retrieved from https://ph01.tci-thaijo.org/index.php/easr/article/view/188437
Issue
Vol. 46 No. 4 (2019)
Section
ORIGINAL RESEARCH

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

References

[1] Thabet H, Meillère S, Masmoudi M, Seguin JL, Barthelemy H, Aguir K. A low power consumption CMOS differential-ring VCO for a wireless sensor. Analog Integr Circ Sig Process. 2012;73(3):731-40.

[2] Boerstler DW. A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHz. IEEE J Solid State Circ. 1999;34(4):513-9.

[3] Song SS, Shin H. An RF model of the accumulation-mode MOS varactor valid in both accumulation and depletion regions. IEEE Trans Electron Dev. 2003;50(9):1997-9.

[4] Jin J. Low power current-mode voltage controlled oscillator for 2.4 GHz wireless applications. Comput Electr Eng. 2014;40(1):92-9.

[5] Cao C, Oo KK. Millimeter-wave voltage-controlled oscillators in 0.13-mm CMOS technology. IEEE J Solid State Circ. 2006;41(6):1297-304.

[6] Catli B, Hella MM. A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications. 2008 IEEE International Symposium on Circuits and Systems; 2008 May 18-21; Seattle, USA. USA: IEEE; 2008. p. 996-9.

[7] Panigrahi JK, Acharya DP. Performance analysis and design of wideband CMOS voltage controlled ring oscillator. 2010 5th International Conference on Industrial and Information Systems; 2010 Jul 29- Aug 1; Mangalore, India. USA: IEEE; 2010. p. 234-8.

[8] Chen ZZ, Lee TC. The design and analysis of dual-delay-path ring oscillators. IEEE Trans Circ Syst Fund Theor Appl. 2011;58(3):470-8.

[9] Mira J, Divel T, Ramet S, Begueret JB, Deval YA. Distributed MOS varactor biasing for VCO gain equalization in 0.13/spl mu/m CMOS technology. 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems; 2004 Jun 6-8; Forth Worth, USA. USA: IEEE; 2004. p. 131-4.

[10] Luo Y, Ma C, Gan Y, Qian M, Ye T. A dual-band CMOS LC-VCO with highly linear frequency tuning characteristics. Microelectron J. 2015;46(12):1420-5.

[11] Azadmousavi T, Aghdam EN. A low power current-reuse LC-VCO with an adaptive body-biasing technique. AEU-Int J Electron Comm. 2018;89:56-61.

[12] Kao JT, Chandrakasan AP. Dual-threshold voltage techniques for low-power digital circuits. IEEE J Solid State Circ. 2000;35(7):1009-18.

[13] Chang HY, Chiu YT. $ K $-band CMOS differential and quadrature voltage-controlled oscillators for low phase-noise and low-power applications. IEEE Trans Microw Theory Tech. 2011;60(1):46-59.

[14] Padovan F, Tiebout M, Mertens KL, Bevilacqua A, Neviani A. Design of low-noise K-band SiGe bipolar VCOs: Theory and implementation. IEEE Trans Circ Syst Fund Theor Appl. 2014;62(2):607-15.

[15] Kumar M. Design of Linear Low-Power Voltage-Controlled Oscillator with I-MOS Varactor and Back-Gate Tuning. Circ Syst Signal Process. 2018;37(9):3685-701.

[16] Ullah F, Liu Y, Wang X, Sarfraz MM, Zhang H. Bandwidth-enhanced differential VCO and varactor-coupled quadrature VCO for mmWave applications. AEU-Int J Electron Comm. 2018;95:59-68.

[17] Svelto F, Erratico P, Manzini S, Castello R. A metal-oxide-semiconductor varactor. IEEE Electron Device Lett. 1999;20(4):164-6.

[18] Maget J, Tiebout M, Kraus R. Influence of the MOS varactor gate doping on the performance of a 2.7 GHz-4GHz LC-VCO in standard digital 0.12 µm CMOS technology. Proceedings of the 28th European Solid-State Circuits Conference; 2002 Sep 24-26; Florence, Italy. USA: IEEE; 2002. p. 491-4.

[19] Deen MJ, Kazemeini MH, Naseh S. Performance characteristics of an ultra-low power VCO. Proceedings of the 2003 International Symposium on Circuits and Systems; 2003 May 25-28; Bangkok, Thailand. USA: IEEE; 2003. p. 697-700.

[20] Andreani P, Mattisson S. On the use of MOS varactors in RF VCOs. IEEE J Solid State Circ. 2000;35(6):905-10.

[21] Eken YA, Uyemura JP. A 5.9-GHz voltage-controlled ring oscillator in 0.18µm CMOS. IEEE J Solid State Circ. 2004;39(1):230-3.

[22] Karimi A, Ebrahimi E. A new modified I-MOS varactor for linear range enhancement. Microelectron J. 2019;90:181-6.

[23] Yoshida T, Ishida N, Sasaki M, Iwata A. Low-voltage, low-phase-noise ring voltage-controlled oscillator using 1/f-noise reduction techniques. Japanese J Appl Phys. 2007;46(4S):2257-60.

[24] Jangra V, Kumar M. A wide tuning range VCO design using multi-pass loop complementary current control with IMOS varactor for low power applications. Eng Sci Tech, Int J. 2019;22(4):1077-86.

[25] Chen ZZ, Lee TC. The design and analysis of dual-delay-path ring oscillators. IEEE Trans Circ Syst. 2011;58:470-8.

[26] Lee WT, Shim J, Jeong J. Design of a three-stage ring-type voltage-controlled oscillator with a wide tuning range by controlling the current level in an embedded delay cell. Microelectron J. 2013;44(12):1328-35.

[27] Danfeng C, Junyan R, Jingjing D, Wei L, Ning L. A multiple-pass ring oscillator based dual-loop phase-locked loop. J Semiconduct. 2009;30(10):105014.

[28] Kinget P. Integrated GHz voltage controlled oscillators. In: Sansen W, Huijsing J, van de Plassche R, editors. Analog circuit design. Boston: Springer; 1999. pp. 353-81.