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A transformation concept and the resulting code generator for the automated implementation of timed automata, given as UPPAAL specification, are proposed in this paper. The concept aims to generate code for data memory restricted target platforms, like embedded systems and sensor network nodes. The output of a transformation is a pointer oriented Cimplementation of the state machines that considers the specified time behavior of the automata. Due to the availability of this code generator, a complete homogeneous and closed work flow can be proposed. It includes specification, verification, and simulation of timed automata in UPPAAL and the automated implementation using the code generator. Hereby, the implementable subsets of timing specification are realised in the compilable code.
The static and dynamic performance of the generated code is checked by comparison of a traditional thread-based implementation of a sensor network application with an according automatically generated system. The results demonstrate a reduction of memory usage of more than 80%, a decreased cyclic execution time at a moderate increasing code size.
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